Integrated circuits are typically formed layer by layer on a substrate, such as on a monolithic semiconducting substrate formed of a group IV material such as germanium or silicon, or of a group III–V material such as gallium arsenide, or a combination of such materials. The layers are typically interleaved electrically conductive layers and non electrically conductive layers. Electrical conductivity between two or more electrically conductive layers is typically provided by an electrically conductive via that extends between the electrically conductive layers through one or more intervening non electrically conductive layer.
As integrated circuits have become increasingly smaller, structures such as the electrically conductive vias have also been reduced in size. Although there has also been somewhat of a reduction in the thickness of the non electrically conductive layers through which the vias pass, the reduction in the thickness of such layers has typically not been commensurate with the reduction in the diameter of the vias. Thus, vias tend to be changing in relative dimension, which is typically referred to as their aspect ratio. When the diameter of the via is relatively wide as compared to the depth of the via, then the aspect ratio of the via is relatively small or low. When the diameter of the via is relatively narrow as compared to the depth of the via, then the aspect ratio of the via is relatively large or high. Because the diameter of vias has generally been reduced at a rate that is larger than that by which the depth of the vias has been reduced, vias have generally been increasing in aspect ratio, or in other words, the vias of state of the art integrated circuit devices tend to have a higher aspect ratio than the vias of older integrated circuit designs.
The reduction in the size or geometry of the integrated circuits has also brought about many other changes in the processes, materials, and structures used to form them. For example, copper has substantially replaced aluminum as the predominant metal of choice for forming electrically conductive connections. Similarly, low k materials are quickly replacing traditional electrically insulating materials such as silicon dioxide as the material that is predominantly used for non electrically conductive layers. Although these relatively new materials have certain benefits which make them generally desirable for newer integrated circuit designs, they also have certain drawbacks or other issues associated with them.
For example, copper tends to readily diffuse into dielectric materials, such as low k materials and other non electrically conductive materials. Thus, when copper is used as a via plug material, a barrier material is typically used to line the sides of the via prior to depositing the copper plug. The barrier material provides a relatively impermeable barrier between the copper via and the non electrically conductive material in which the via is formed, so that the copper does not inter diffuse with the non electrically conductive material and create problems. For example, such inter diffusion can create shorts between adjacent vias or other electrically conductive structures, or can create open circuits if the non electrically conductive material diffuses into the via to a sufficient degree.
Unfortunately, as the aspect ratio of vias has increased, as described above, it has become increasingly difficult to properly form the barrier layer, particularly at the bottom of the vias. Thus, there is a concern that such vias, especially those with relatively higher aspect ratios, will have an inadequate barrier layer at the bottom of the via, and experience premature failures or other problems.
What is needed, therefore, is a method for producing vias, including relatively high aspect ratio vias, that provides enhanced barrier layer protection at the bottom of the via.